Resume

Worked with a large C codebase to implement customer requirements on PowerPC embedded controller

Organized and managed software requirements from customers for a development/validation team of 8 members

Led investigation and development of feature to reduce memory footprint by 40% of Modbus data lookup function

Developed Python tools to assist in software development, test automation, and improve process efficiency

Created and documented rigorous testing procedures for new features implemented by team

Spearheaded FMEA analysis of features to identify risks and mitigation methods for controls scheme

J1939, CAN, TCP/UDP, Modbus, SCADA, Failure Mode Analysis, C, Python

• Individually, designed and tested a multi-cycle CPU that implemented the RISCV RV32I ISA in SystemVerilog

• Designed and implemented an out-of-order RV32I pipelined CPU based on the Tomasulo method

• Validated the OoO CPU using UVM style test benches in addition to using the Symbiotic RISCV formal model

• Improved the design after identifying throughput botteleck in instruction fetch/decode stage of pipeline

• Identified and resolved timing closure failures with timing analysis tools (Quartus toolset)

• Implemented a simple pipelined RISC-V CPU using Vivado HLS workflow

• Investigated the usefulness of HLS tools in control heavy IP design such as CPUs

• Identified benefits and pitfalls in accelerating control heavy kernels with current HLS workflows

• Enumerated list of extensions to the existing Vivado HLS workflow to enable acceleration of future projects

• Implemented the base version of the convolutional neural network (CNN) LeNet for handwritten character recognition

• Designed a custom accelerator using high level synthesis (HLS) for the LeNet implementation

• Integrated hardware accelerator and top-level software driver on a Xilinx Pynq-Z2 SoC development board

• Achieved a throughput increase of ~9x for a pipelined accelerated implementation over the software implementation

• Designed wearable heart rate monitor that interacted with base station to enforce power safety interlock for the machine shop such that two people must be present and wearing a monitor in order to operation tools

• Developed high level scheme for wearable, signal beacons, and power interlock base station

• Calculated distance via BLE strength signals and utilized distance trilateration to determine position in shop

• Programmed embedded nRF51822 microcontroller for Bluetooth application and power requirements

• Collaborated with teammates to fulfill other requirements of the project and document process fully

• Reverse engineered the logic and serial communication design of the Nintendo Gamecube controller

• Implemented a state-based logic driver using System Verilog to communicate over a serial data line with the controller

• Utilized the driver to control players in a simplified version of the classic game Asteroids

• Implemented a naïve version of the N-body force algorithm and compared to alternative implementations

• Evaluated the effectiveness of memory coalescence on throughput, specifically on warp divergence and stalls

• Implemented bare-metal Linux kernel on x86 Pentium IV core with C and hand-assembly (emulated in QEMU)

• Integrated real time clock and interrupt controller to interface with peripherals (mouse and keyboard)

• Laplace domain solving of inverted pendulum plant transfer function

• Lab derivation of plant characteristics - friction coefficients and motor strength

• Controller tuning and implementation

• Matlab C CodeGen for embedded controller